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Director of ASIC Verification Engineering

Job Overview:

Candidate will work in Toshiba's global team, leading the design and implementation of next generation Datacenter PCIe/SATA SSD (solid state storage) SoCs.

As a leader of the Storage Research and Design Center SoC development team, the Director, ASIC verification is responsible for creating innovative SSD controllers design. The candidate will be leading the verification team to develop Flash Controller H/W architecture(s) and new ASIC design(s) with functional verification and validation as part of the primary task. The candidate will mentor the verification team throughout the SoC development phases in developing comprehensive testplans, verification methodology and environments, and be responsible for functional verification and validation of SoC.

Responsibilities:

  • Manage an SoC verification team, including recruiting and building team capabilities
  • Participate in the definition and deployment of the verification methodology
  • Drive development of the verification IPs and integration in the verification platform
  • Drive definition of the verification testplan in collaboration with the design and architecture teams
  • Drive implementation of the functional coverage metrics in accordance to the verification plan
  • Work closely with Design & Firmware teams to resolve hardware issues
  • Validate SoC design in FPGA prototyping and emulation platforms
  • Functional silicon validation and interface with firmware engineers to resolve issues

Requirements:

Minimum of 10 years of experience in the following domains:

  • Strong management skills
  • Ability to hire and retain people
  • Comfortable in managing directly small (10) to medium (15) sized teams.
  • Proven experience in SSD controller SoC verification and validation
  • Proven experience in state-of-the-art verification methodologies including SV/UVM, Coverage driven verification and formal verification
  • Experience developing verification firmware to validate FPGA/Palladium platforms and silicon.
  • Knowledge of OOP and software engineering techniques
  • Solid experience in PCIe & SATA Host blocks & understand the protocol(s)
  • In-depth knowledge of NAND Flash memories & SSD eco-system.
  • A proven solid track record in managing & leading a HW verification team.

Education:

  • MSEE or PhD in Electrical Engineering or Computer Science

Equal Opportunity Employer Minorities/Women/Protected Veterans/Disabled
Type Full-time
Location CA, San Jose

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