Toshiba America Electronic Components, Inc.
Location: San Jose, CA
TAEC is looking for a hands on Firmware Engineering Manager to join its SSD firmware team. In this role, you will be responsible for designing and delivering SSD firmware towards Enterprise SSD products. As a senior member of the TAEC engineering team, you will participate in all phases of our next generations SSD products.
Your responsibilities will include, but are not limited to, the following:
Contributing to our products definition jointly with peer engineering teams and product management.
Prototyping product concepts and contributing to firmware architecture.
Innovation and creativity within the engineering function.
Specifying the firmware architecture and developing code targeted for embedded systems (this is a hands on role!).
Leading a team of firmware engineers through design reviews and structured development.
Developing schedules and executing to these.
Assisting other organizational functions in ensuring a successful product launch (hardware engineering, internal test activities, product engineering and customer qualifications support).
As a member of the TAEC engineering team, you will have the opportunity to innovate in a fast growing SSD market.
To succeed in this role, the candidate must have the following proven experiences or expertise:
Strong leadership, mentoring and interpersonal skills.
Proven track record as a team lead or manager, including 3 years as a manager.
Proficient communication skills both written and verbal in order to interface with firmware engineers as well as peer engineering teams and partners, in some cases across sites.
Experience in architecting and delivering complex firmware systems in small and mid-size team environments.
Ability to scope and estimate development effort.
Proficient and comfortable with standard software development methodologies including source control systems (such as SVN, CVS or similar) and defect tracking systems (such as bugzilla, JIRA or similar)
10 years of embedded firmware experience is required, including successfully delivering firmware for two different embedded systems (platforms and CPUs)
Over 10 years in C programming, exposure to C++ a plus.
Strong understanding of RISC processors, including but not limited to: C calling conventions, instruction and data caches, CPU pipeline and its impact to firmware, CPU contexts for interrupts and other operating modes.
10 years of Firmware/System debug skills with tools such as JTAG debugger, GDB and protocol analyzer.
5 years of prior experience with scripting languages for test automation (Perl, Python or similar).
While not absolutely required, experience with the following is highly preferred and will highly increase your ability to impact the architecture and/or design:
Prior SSD design experience of FTL including but not limited to RAID, wear leveling and garbage collection.
Understanding of NAND flash concepts: interfaces (ONFI, Toggle), architectures (MLC, TLC and multiplane) and challenges due to smaller geometries (read and retry)
Experience with Multi-Core firmware design and inter-processor communications.
BS degree required. MS preferred.